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Student Job (Mixed Verification Engineers)

We are looking for a serious student to help the team to take Full-chip design simulations pre tape-out our products, during 2 days per week from June to December 2025.

Job description

Your tasks mainly include:

    • Running pre-designed testcases and reporting the results
    • Report Script writing (using tcl language)
    • Create straight forward checkers and debugging them (in system Verilog)
    • Organization of project files and directories according to given rules
    • And more depending on your skills and knowledge

Profile required

  • Student in electronics bachelor/master
  • Digital and Analog basic knowledge
  • Knowledge about mixed signal simulations is a plus
  • Basic knowledge in Verilog/system Verilog
  • Fluent in French, English is essential
  • Besides being a great team player, you are:

o Rigorous and quality-minded
o Autonomous
o Ready to help (even on less interesting tasks)

Type of contract

CDD

Sector

Engineering

Location

Belgium

Why choose e-peas?

If you join us, it’s a benefit not only for our growing team, but for you too:

We let you express your creative intelligence.

You’ll be joining a team united in a shared mission. Since e-peas was founded, every engineer who has joined us continues to innovate alongside us, driving progress every step of the way.

Join a company committed to sustainable innovation, pioneering solutions that reduce reliance on wasteful batteries.

You’ll have the opportunity to learn alongside a group of experts who are passionate about extreme low power, and your fresh eye will be appreciated.

Work in a stimulating and pleasant environment within our BREEAM-certified offices.

You’ll have the opportunity to work for a multi-award-winning company that knows no defeat when it comes to innovation.

Your new adventure begins here

Submit your application: our team will thoroughly review your profile and reach out if we find a potential match.

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